1. Field of the Invention
The present invention relates to a technology for driving a display device, and more particularly, to a driving control circuit of a display device that is capable of preventing a black screen from being unnaturally displayed in a non-signal state when using a timing controller which is merged with a plurality of source driver ICs.
2. Description of the Related Art
In recent years, flat-panel display devices, such as a liquid crystal display (LCD), a plasma display panel (PDP), an organic light emitting diode (OLED) panel and the like, have been widely used. Among such devices, liquid crystal displays are continually proliferating.
As a typical example of a flat panel display device, the liquid crystal display is configured to include a display panel (or a liquid crystal panel), in which a plurality of gate lines and a plurality of data lines are arranged in directions perpendicular to each other to create a pixel area having a matrix form; a driving circuit portion, for supplying driving signals and data signals to the display panel; and a backlight, for providing light to the display panel.
FIG. 1 shows a block diagram of a display device that includes a display panel and a driving circuit portion according to the related art. As shown in FIG. 1, the display device is configured to include a display panel 110, a timing controller 120, a plurality of source driver ICs 130A to 130C, and a gate driver IC 140.
Referring to FIG. 1, the display panel 110 includes a plurality of pixels arranged at intersections of the plurality of gate lines and the plurality of data lines in a matrix form. A transistor formed in each of the pixels transfers data voltage inputted from the data line to a pixel driving element in response to a scan signal supplied from the corresponding gate line.
The timing controller 120 is installed on a main board, which is provided separately from the display panel 110, to generate a gate control signal for controlling a gate driver IC 140 and data control signals for controlling source driver ICs 130A to 130C by using vertical and horizontal sync signals and a clock signal supplied from a system. In addition, the timing controller 120 rearranges digital video RGB data (hereinafter, referred to as ‘data’) inputted from the system to supply the data to the source driver ICs 130A to 130C.
The source driver ICs 130A to 130C convert the data into data voltage corresponding to a gray scale value to supply the converted data voltage to data lines of the display panel 110 in response to the data control signal supplied from the timing controller 120.
The gate driver IC 140 sequentially supplies a scan pulse (gate pulse) to the gate line in response to the gate control signal supplied from the timing controller 120 such that horizontal lines of the display panel 110, to which the data are supplied, are selectively driven.
In the state in which a normal signal is not inputted, the timing controller 120 provides data (mainly, black data) generated from an oscillator in the timing controller 120 to the source driver ICs 130A to 130C. The state in which a normal signal is not inputted includes a state in which power is supplied and a signal is not inputted (all intervals of the normal signal inputted after power is supplied) and a state in which power is applied and a non-normal signal, which deviates from a normal operational range, enters.
However, even if the normal signal is not inputted, since a single timing controller 120 provides data to the plurality of source driver ICs 130A to 130C to drive them, a problem in which data outputs of the plurality of source driver ICs 130A to 130C need to be synchronized with each other does not occur.
In recent years, in order to meet the needs of larger and thinner display devices, a product (TMIC) (hereinafter, referred to as “TMIC”), each timing controller is merged with a plurality of source driver ICs, has been developed.
Thus, if each timing controller is merged with a plurality of source driver ICs, the timing controller includes an oscillator on the inside to perform a timing control function and a source driving function. Accordingly, when a plurality of TMICs is used for driving the display panel, deviation between the frequencies generated from the oscillator included in each TMIC can occur, and thus in the state in which a normal signal is not inputted, if each TMIC outputs image data by using a horizontal synchronization signal, a vertical synchronization signal and a data enable signal generated by a clock signal of the internal oscillator, there is a problem in that the image data are not synchronized with each other.
In addition, there is a problem in that an enable interval of the data enable signal generated from the oscillator, which generates the clock signal having the slowest frequency, is longer than one horizontal interval of the horizontal synchronization signal generated from the oscillator, which generates the clock signal having the fastest frequency.
Further, the input of the gate driver IC uses an output of a master TMIC, and thus there is a problem in that a latch enable signal of the last datum of each TMIC precedes a gate output enable signal.
Accordingly, in the display device of the related art, there is a defect in that an unnatural black screen is displayed on a display panel when a vertical synchronization signal or a horizontal synchronization signal or a data enable signal, or a data clock signal is not inputted, or when a signal that deviates from a normal operational range is inputted, in the state in which power is supplied.